The Future of DDR4

DDR4 is the newest iteration in DRAM; with data rates reaching 2400 Mb/s, DDR4 increases performance up to 50% over DDR3. DDR4 also delivers a 20% reduction in voltage over DDR3.

Benefits

• New JEDEC POD12 (1.2V) interface standard for DDR4
• Differential signaling for the clock and strobes
• Nominal and dynamic ODT: Improvements to the ODT protocol and a new Park Mode allow for a nominal termination and dynamic write termination without having to drive the ODT pin
• DBI: to help reduce power consumption and improve data signal integrity, this feature informs the DRAM as to whether the true or inverted data should be stored
• New CA parity for command/address bus: Providing a low-cost method (parity) to verify the integrity of command and address transfers over a link, for all operations
• Per-DRAM Addressability: Can uniquely select and program DRAMs within a memory structure
• DLL off mode supported
• In addition, DDR4 has been designed in such a way that stacked memory devices may prove to be a key factor during the lifetime of the technology, with stacks of up to 8 memory devices presenting